Multi-Processor Architecture for Image Processing
Mayank Kumar and Puspendre Rastogi
Mini Project in Department of Electrical Engineering, IIT Delhi
Submitted: April, 2009
The IDEA
Basic Image processing tasks are highly parallel as same tasks are repetitively applied to different regions (pixel regions) of the image, eg correlation (template matching), morphology, arithmetic and boolean logic, filtering to name a few.
But, image processing algorithms developed using these basic tasks are best expressed as sequential instructions. Thus, a large class of algorithms could be characterized as locally sequential (operating on few pixel neighborhood) and globally parallel (same set of instructions applied to different region of image).
A unique architecture comprising of an array of Processing Elements (PE) fed by different regions of the image/camera and essentially running same sequential algorithm is well suited to accelerate image processing for such kind of algorithms.
Major Challenges to resolve
- Design of multi-processor architecture for efficient and parallel flow of data to processor and inter-processor communication which is the most critical aspect of the design. .
- Design of PE (Processing Element) architecture to execute basic image processing tasks efficiently.
Our Solution
Links
1. End Term Presentations – mini project End Term (PPT 86 KB)
2. Mid Term Presentations – mini project Mid Term (PPT, 111 KB)
Online Slide